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RD1006--I2C
- RD1006--I2C与存储器的IP 代码及说明文档,lattice提供,I2C Controller for Serial EEPROMs 源代码可用,并且包含tb文件-RD1006 -- I2C and memory IP code and documentation. Lattice offer I2C Controller for Serial EEPROMs source code available, and document contains tb -
sd_audio_aic23
- SD卡和AIC23数字音频输出实验, FreeDev Audio Dsp Board采用了TI公司的TVL320AIC23 1、控制接口使用I2C,Quartus中将CS置低(器件地址0011010)。 2、数字音频接口使用了组件FreeDev_aic23,有三种测试和应用 模式,中断结合DMA方式能在NIOS II中采集和发送数据。中断信号 产生于模块中FIFO缓冲区的半满信号,读取数据端口自动清除中断 请求信号。 3、I2C IP 和FreeDev_aic23 IP分别在Qu
i2c
- 这是NOIS II的IP CORES I2C是个好东西啊 是FPGA学习的好东西
i2c_IP
- altera 的i2c ip核,可直接调用 在quartus中把库指向文件位置就可
i2c_p
- I2C IP,可以直接用,有相关规范文档说明
I2c Core IP 核
- 可在SOPC中运行的IP核,经过系统验证
基于I2C的EEPROM的读写IP 核
- 基于I2C的EEPROM的读写IP 核
tcp_client.rar
- Wavecom Q24 tcp/ip conncetion example code,Wavecom Q24 tcp/ip conncetion example code
I2C_IP_core
- I2C IP CORE 及开发文档, 网上搜集-I2C IP CORE and the development of documentation, on-line collection of
I2C_test
- FPGA EP2C5Q288C8 I2C 原码,测试OK 打开即用.-FPGA EP2C5Q288C8 I2C original code, test that is used to open OK.
I2C
- 详细描述了I2C的技术规范 版本号为2.1 是采用VHDL编写I2C的IP核的一本不错的参考资料-A detailed descr iption of the I2C specification version 2.1 is the use of VHDL for the preparation of the IP core I2C a good reference
I2C
- IIC通信协议IP核,描述IIC协议在FPGA上的实现-IIC communications protocol IP core
i2c_master_slave_core
- I2C master/slave IP core
altera_avalon_i2c_V90
- I2C IP for Quartus V9.0, can used in SOPC builder.
altera_avalon_i2c_V91
- I2C IP for Quartus V9.0 sp1, can used in SOPC builder.-I2C IP for Quartus V9.0, can used in SOPC builder.
oc_i2c_master_top_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
oc_i2c_master_byte_ctrl_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
i2c
- i2c master controller, free ip
i2c
- I2C IP CORE Verilog quartus-I2C IP CORE Verilog quartusii
i2c
- 这是基于altera avalon-MM总线的I2C IP核。利用VHDL语言编写。(This is an I2C IP core based on the altera avalon-MM bus. Using VHDL language.)